Field of the Invention
Embodiments of the present invention relate to a nonvolatile semiconductor memory device.
Description of the Related Art
In the field of nonvolatile semiconductor memory devices, a three-dimensional type NAND type flash memory has been receiving attention as a device capable of achieving a high level of integration without being limited by a resolution limit of lithography technology. This three-dimensional type NAND type flash memory comprises a stacked body in which a plurality of conductive layers each functioning as a word line or select gate line and a plurality of inter-layer insulating layers are stacked alternately on a semiconductor substrate, and comprises a column shaped semiconductor layer disposed so as to penetrate this stacked body. This semiconductor layer functions as a channel of a memory cell. Moreover, the three-dimensional type NAND type flash memory comprises a block insulating layer, a charge accumulation layer, and a tunnel insulating layer disposed sequentially between the conductive layer and the semiconductor layer in the stacked body.
In the case of a three-dimensional type NAND type flash memory having the above-described structure, film thinning of the charge accumulation layer is conceivable as one of measures for reducing a cost of the memory. However, it becomes a problem that when the charge accumulation layer undergoes film thinning, its charge holding capacity and charge trapping efficiency lower.